The aim of the course is to focus on the production of a prototype including an ARM core processor and a dedicated co-processor on FPGA Xilinx. The approach includes both hardware vision – co-processor development with VHDL and interfacing with an ARM processor – and software – application in embedded C for communication with the dedicated co-processor.
| On completion of the unit, the student will be capable of: | Classification level | Priority |
|---|
| Percentage ratio of individual assessment | Percentage ratio of group assessment | ||||
|---|---|---|---|---|---|
| Written exam: | 100 | % | Project submission: | % | |
| Individual oral exam: | % | Group presentation: | % | ||
| Individual presentation: | % | Group practical exercise: | % | ||
| Individual practical exercise: | % | Group report: | % | ||
| Individual report: | % | ||||
| Other(s): % | |||||
| Type of teaching activity | Content, sequencing and organisation |
|---|---|
| Course | Description of FPGA Xilinx / SoC ARM / Sectors of software and hardware design Xilinx tutorials: Vivado framework Hardware integration of a cryptographic IP (AES) on a ZedBoard platform Xilinx tutorials on IP integration and the Vivado hardware library Xilinx tutorials : Embedded Systems (1) Xilinx tutorials : Embedded Systems (2) Design of a hardware cryptographic IP (AES) with AX14 bus for interaction with the ARM processor Development of a software application on SdK Xilinx Communication of the software application with the hardware IP, via. an AXI4 bus Exam |